GATE Computer Engineering (Batch 4)
-
Introduction to Number System
10.55
-
Number System Conversion
24.04
-
Numericals Based on Number System-Part 1
21.36
-
Numericals Based on Number System-Part 2
18.14
-
Complement Number Representation
19.31
-
Structure of C Program
5.02
-
Installing Atom
5.51
-
Basics of Printf
9.55
-
Variables and Datatypes
18.26
-
Basics of Scanf
9.09
-
Math Operators in C
11.28
-
Program Example 1
8.33
-
Program Example 2
13.09
-
Signed Number Representation for Binary
32
-
Important Properties of 1's and 2's Complement Numbers
17.43
-
Concept of Overflow and Sign Extension
18.52
-
Subtraction Using R's and (R-1)'s Complement Method
34.04
-
Program Example 3
5.15
-
Increment and Decrement Operators
22.13
-
More on Increment and Decrement Operators
19.11
-
Bitwise Operators
17.23
-
Binary Codes
30.06
-
Generation of Gray Code
14.41
-
Conversion of Binary to Gray and Gray to Binary Codes
12.57
-
Gate Numerical on Number System Part 1
28
-
Gate Numerical on Number System Part 2
25.07
-
For Loop
18.27
-
While Loop
11.41
-
If Else Statement
5
-
Nested if Else
7.11
-
Logical Operators
10.51
-
Switch Case Part 1
11.07
-
Switch Case Part 2
13.36
-
Boolean Laws
25.16
-
Concept of Minterms and Maxterm
22.32
-
Problems Based on Minterms and Maxterms
32.37
-
Complementing the Function
11.25
-
Ternary Operator
7.22
-
Do While Loop
9.43
-
Practice Questions on Control Structures Part 1
26.3
-
GATE 2015 Question on Control Structures
10.37
-
GATE 2017 Question on Control Structures
13.31
-
Practice Questions on Control Structures Part 2
15.3
-
Practice Questions on Control Structures Part 3
14.03
-
Introduction to K-Map
15.49
-
Grouping Techniques in K-Map
31.56
-
Numerical Based on Boolean Algebra
28.24
-
Functions Introduction
16.21
-
Function Calls in Detail
7.02
-
Programming Example of Function
12.42
-
Function Definition and Function Declaration
19.03
-
Types of Functions Void and Non Void
4.57
-
Example of Void Function
10.25
-
Storage Class Auto
16.27
-
Basic Logic Gates
6.26
-
Universal Logic Gates
16.25
-
Numericals Based on Universal Logic Gates
22.3
-
Ex-OR Gate
13.37
-
Important Properties of Ex-OR Gate
20.02
-
Gate Numericals on Logic Gates
36.04
-
Register Storage Class
13.45
-
Static Storage Class
21.29
-
Local Parameter of Function
14.38
-
Example 1 on Storage Class
10.2
-
Example 2 on Storage Class
10.12
-
Example 3 on Storage Class
10.56
-
Example 4 on Storage Class
11.1
-
GATE 2012 Question on Storage Class
11.05
-
Introduction to Combinational Logic Circuit
11.24
-
Half Adder
7.14
-
Half Subtractor
7.17
-
Full Adder
12.23
-
Implementing Full Adder with Half Adder
10.46
-
Concept of Comparator
20.47
-
4-Bit Parallel/ Ripple Adder
15.55
-
4-Bit Serial Adder
18.46
-
GATE 2019 Question on Storage Class
9.18
-
Recursive Functions Introduction
17.07
-
Recursive Function Find Sum of First N Natural Numbers
5.12
-
4-Bit Adder/ Subtractor
11.03
-
Encoder
8.11
-
Decoder
11.36
-
Full Adder Using 3:8 Decoder
14.56
-
Decoder Expansion
17.34
-
Concept of Demultiplexer
7.37
-
Decoder Using Demultiplexer
6.35
-
Concept of Multiplexer
8.47
-
Multiplexer Expansion
14.4
-
Recursive Function to Find X Raise to Y
9.53
-
Recursive Function to Find Fibonacci Number
9.14
-
Recursive Function for Decimal to Binary
19.31
-
Recursive Function to Convert Decimal to Hexadecimal
14.48
-
Practice Question on Recursion
5.27
-
GATE 2018 Question on Recursion
11.31
-
GATE 2017 Question on Recursion
13.32
-
GATE 2016 Question on Recursion
9.08
-
GATE 2019 Question on Recursion
6.03
-
Implementing 2:1 Mux Using 4:1 Mux
8.4
-
2:1 Multiplexer as Universal Logic Circuit
16.03
-
4:1 Multiplexer as Universal Logic Gate
5.52
-
Gate Problems on Mux, Decoder and Decoder
29.13
-
Introduction to Sequential Logic Circuit
14.44
-
NOR Latch
14.54
-
NAND Latch
10.32
-
Pointers Fundamentals
18.5
-
Data Type of Pointer
18.49
-
Demonstration of Pointers Using C Program
13.13
-
Example Program 1 on Pointers
9.23
-
Example Program 2 on Pointers
13.33
-
Example Program 3 on Pointers
11.55
-
Passing Address to Function Call by Address
10.17
-
Problem with RS Latch
17.43
-
Delay Latch/Flip Flop
4.49
-
JK Latch and T- Latch
7.48
-
Excitation Table for all Latches/Flip Flops
19.52
-
Latch/Flip Flop Conversion Concept
23.22
-
SR Latch to JK Latch Conversion
18.09
-
Call by Address Example 1
13.21
-
Call by Address Example 2
10.19
-
Swapping Value of Two Variables Using Call by Address
7.08
-
GATE 2015 Question on Pointers
8.04
-
GATE 2016 Question on Pointers
11.16
-
Relation Between Array and Pointer - Part 1
18.54
-
Relation Between Array and Pointer - Part 2
10.43
-
D Latch to JK Latch Conversion
8.58
-
D Latch to T Latch Conversion
6.46
-
Concept of Triggering
14.17
-
Difference Between Latch and Flipflop
10.59
-
Behaviour of Flip Flop in Toggle Mode
13.19
-
Race Around Condition in JK Latch
14.44
-
Master-Slave JK Flip Flop
9.03
-
Introduction to Shift Register
9.17
-
Traverse Array by Using Pointer
15.2
-
GATE 2019 Question on Array and Pointers - Part 1
4.47
-
GATE 2019 Question on Array and Pointers - Part 2
10.56
-
Pass Array to Function
17.58
-
Creating Variables Using Malloc
27.17
-
Create Array Using Malloc
17.07
-
Demonstration Program for Creating Array Using Pointer
7.27
-
Two Dimension and Pointer
25.32
-
Classification of Shift Register
28.48
-
Ring Counter
17.46
-
Twisted Ring Counter
14.12
-
Introduction to Asynchronous Counter
10.03
-
Asynchronous Up Counter
15.14
-
Asynchronous Down Counter
19.45
-
Demonstration Program of 2-Dimension Array and Pointers
11.08
-
Pointer to Pointer
7.58
-
Pointer to Function
18.02
-
GATE 2003 Question on Pointer
12.09
-
Gate 2003 Question on Pointer - Part 2
9.59
-
GATE 2000 Question on Pointer
15.31
-
Asynchronous Up/Down Counter
14.1
-
Introduction To Asynchronous MOD Counter
17.3
-
Designing Asynchronous MOD 10 Counter
11.53
-
Introduction to Synchronous Counter
11.55
-
Designing Synchronous Counter - Part 1
12.59
-
Designing Synchronous Counter - Part 2
15.03
-
Finite State Machine
10.45
-
Char Datatype Fundamentals
19.35
-
String Fundamentals Part 01
5.47
-
String Functions Part 01
12.56
-
Array of Char and Pointers
11.47
-
GATE 2011 Question on Array of Char
9.4
-
GATE 2002, 2008, 2017 Question on Array of Char
21.37
-
Gate 2017 Question on Array of Char
8.42
-
Non Overlapping Sequence Detector
16.52
-
Overlapping Sequence Detector
28.48
-
Gate Numericals Based on Sequential Logic Circuit
33.18
-
Gate Numericals on FSM
22.36
-
Structure Fundamental - Part 01
20.57
-
Structure Fundamental - Part 02
4.1
-
Structure Declaration Using Typedef
5.22
-
Initialize a Structure
10.37
-
Demonstration Program on Structures
8.23
-
Pointer to Structure
19.39
-
GATE 2018 Question on Structures
10.34
-
Self Referential Structure
19.05
-
Data Structure Introduction
10.52
-
Comparison of Link List with Arrays
18.38
-
Types of Link List
6.47
-
Singly Link List Program Part 1
44.1
-
Singly Link List Program Part 2
12.53
-
Singly Link List Program Part 3
31.34
-
Circular Link List Program Part 1
26.14
-
Circular Link List Program Part 2
15.46
-
Doubly Link List Program Part 1
33.09
-
Doubly Link List Program Part 2
10.21
-
Doubly Link List Program Part 3
5.57
-
Doubly Link List Program Part 4
18.33
-
Print Singly Link List in Reverse Order
18.06
-
Convert Singly Link List in Reverse Order
19.07
-
GATE Questions on Link List Part 1
34.29
-
GATE Questions on Link List Part 2
16.4
-
Binary Search Tree Fundamentals
33.22
-
Terms Used in Binary Tree
17.51
-
Stack Data Structure
22.14
-
Linear Queue Using Array
29.49
-
Circular Queue Using Array
23.17
-
Queue Using Link List
17.05
-
Binary Tree Program to Insert Node
35.33
-
Binary Tree Traversal
28.23
-
Recursive Functions for Inorder Preorder and Postorder Part 1
35.15
-
Count Leaf Nodes in a Binary Tree
31.12
-
Count Number of Non Leaf Nodes in Binary Tree
16.51
-
Construct Binary Tree from Traversal Outputs
34.52
-
Delete a Node from Binary Tree
29.28
-
GATE 1995, 1996 Questions on Binary Tree
9.17
-
GATE 1997, 1998, 2000 Question on Binary Tree
21.07
-
GATE 2018 Question on Binary Tree
6.29
-
Multiway Search Tree Part 1
32.24
-
Multiway Search Tree Part 2
30.35
-
Multiway Search Tree Part 3
13.01
-
AVL Tree Introduction
25.31
-
Rotation Algorithm for AVL Tree
16.07
-
Multiway Search Tree Part 4
7.21
-
B+ Tree
21.28
-
Construction of B+ Tree
22.24
-
Application of B+ Tree
9.29
-
GATE Questions on Multiway Tree
28.54
-
Construction of AVL Tree Example 1
20.57
-
Construction of AVL Tree Example 2
22.18
-
Infix, Prefix and Postfix Notation
33.01
-
Expression Tree
15.21
-
Algorithm to Evaluate Postfix Expression
22.4
-
Binary Heap Introduction
25.09
-
Construction of Max Heap Part 1
29.34
-
Infix to Postfix Conversion Algorithm Part 1
47.22
-
Infix to Postfix Conversion Algorithm Part 2
7.51
-
GATE Questions on Expression Evaluation
29.41
-
GATE 2018 Question on Expression Tree
10.18
-
Construction of Max Heap Part 2
6.13
-
GATE 2009 2014 2001 2015 Question on Binary Heap
19.57
-
GATE 2011 2009 Question on Binary Heap
7.19
-
Graph Fundamentals
28.05
-
DFS Graph Traversal
26.13
-
BFS Graph Traversal
13.39
-
DFS Algorithm
34.12
-
BFS Algorithm
34.23
-
Types of Edges in DFS Traversal
30.08
-
GATE 2006 Question 1 on DFS Traversal
9.5
-
GATE 2008 Question on DFS Traversal
6.32
-
Introduction Registered Organisation Memory Basics
24.51
-
Introduction to Register Set
17.34
-
Single Accumulator Organization : Size 1
18.39
-
Comparison of Algorithm and Program
13.14
-
Characteristics of Algorithm
10.25
-
How to Write Algorithm
8.38
-
How to Analyse Algorithm
10.26
-
Analyze Algorithm by Frequency Count Method Part 1
14.05
-
Analyze Algorithm by Frequency Count Method Part 2
21.31
-
Analyze Algorithm by Frequency Count Method Part 3
10.26
-
Single Accumulator Organization : Purpose 2
26.5
-
Single Accumulator Organization : Connections 3
21.41
-
General Register Organization 1
17.34
-
General Register Organization 2
14.23
-
Classes of Functions and Growth Rate
9.31
-
Asymptotic Notation Part 1
31.03
-
Asymptotic Notation Part 2
12.06
-
Asymptotic Notation Part 3
14.5
-
General Register Organization 3
8.11
-
Flag Register
23.16
-
Stack Organization 1
29.07
-
Properties of Asymptotic Notations
21.05
-
Exercises Using Properties of Asymptotic Notations - Part 1
10.29
-
Exercises Using Properties of Asymptotic Notations - Part 2
14.57
-
Comparing Functions
31.08
-
Best Case, Worst Case and Average Case of Algorithm
20.29
-
Stack Organization 2
9.35
-
Instruction Cycle 1
11.52
-
Instruction Cycle 2
15.14
-
Instruction Cycle 3
12.01
-
Instruction Formats : Number of Operands 1
16.2
-
Recurrence Relation for Decreasing Function Part 1
18.24
-
Recurrence Relation for Decreasing Function Part 2
16.59
-
Recurrence Relation for Decreasing Function Part 3
16.4
-
Summary of Decreasing Function
27.42
-
Instruction Formats : Number of Operands 2
15.41
-
Instruction Formats : Number of Operands 3
14.53
-
Instruction Formats : Location of the Operand 1
10.29
-
Instruction Formats : Location of the Operand 2
17.59
-
Tree Method to Analyze Recurrence Relation
25.56
-
Recurrence Relation for Dividing Function Part 1
15.46
-
Recurrence Relation for Dividing Function Part 2
10.23
-
Recurrence Relation for Dividing Function Part 3
14.08
-
Recurrence Relation for Dividing Function Part 4
14.33
-
Instruction Formats : Location of the Operand 3
16.54
-
Instruction Formats : Location of the Operand 4
16.5
-
Instruction Formats : Sub Routine Call and Return
22.31
-
Instruction Formats : Register Reference Instructions
23.25
-
Instruction Formats : I O Reference Instructions
11.28
-
Master's Theorem
18.24
-
Exercises Solved Using Master's Theorem
12.5
-
More Examples of Recurrence Relations Part 1
15.41
-
More Examples of Recurrence Relations Part 2
9.46
-
Types of Instructions1
18.57
-
Types of Instructions2
14.59
-
Types of Instructions 3
13.2
-
Binary Search Fundamentals
26.36
-
Binary Search Non Recursive Algorithm
21.57
-
Binary Search Recursive Algorithm
18.38
-
Gate Questions on Binary Search
25.5
-
Addressing Modes 1
16.08
-
Addressing Modes 2
15.49
-
Addressing Modes 3
17.53
-
Control Unit 1
12
-
Control Unit 2
17.22
-
Merge Sort Part 1
28.5
-
Merge Sort Part 2
32.16
-
Control Unit 3
22.29
-
ALU Design 1
16.47
-
ALU Design 2
15.08
-
ALU Design 3
28.02
-
Time Complexity of Merge Sort
17.02
-
Quick Sort Part 1
22.3
-
Quick Sort Part 2
19.33
-
Model Gate Question On Instruction Size
15.46
-
GATE Question 1
5.41
-
GATE Question 2
6.43
-
GATE Question 3
5.02
-
GATE Question 4
4.1
-
GATE Question 5
7.41
-
GATE Question 6
8.1
-
GATE Question 7
20.15
-
Quick Sort Part 3
24.09
-
Quick Sort Part 4
12.11
-
Time Complexity of Quick Sort
19.24
-
Comparison of Merge Sort and Quick Sort
15.1
-
GATE Question 8
14.13
-
GATE Question 9
11.13
-
GATE Question 10
5.12
-
GATE Question 11
12.13
-
GATE Question 12
4.38
-
GATE Question 13
9.55
-
GATE Question 14
3.23
-
GATE Question 15
5.08
-
GATE Question 16
10.57
-
GATE Question 17
10.05
-
GATE Question 18
9.1
-
GATE Question 19
11.34
-
GATE Question 20
13.58
-
Gate Questions on Quick Sort Part 1
20.11
-
Gate Questions on Quick Sort Part 2
9.4
-
Gate Questions on Quick Sort Part 3
13.45
-
Introduction To Memory Hierarchy (Part 1)
18.24
-
Introduction To Memory Hierarchy (Part 2)
8.45
-
Introduction to RAM and ROM
18.43
-
Memory Address Mapping 1
26.2
-
Bubble Sort
23.46
-
Selection Sort
25.39
-
Insertion Sort Part 1
15.43
-
Insertion Sort Part 2
13.38
-
Memory Address Mapping 2
22.56
-
Memory Address Mapping 3
7.57
-
Memory Address Mapping 4
8.01
-
Memory Address Mapping 5
6.17
-
Locality of Reference 1
14.27
-
Locality of Reference 2
7.47
-
Fundamentals of Heap
18.31
-
Stage 1 of Heap Sort
21.37
-
Stage 2 of Heap Sort
12.35
-
Analysis of Heap Sort Part 1
14.11
-
Analysis of Heap Sort Part 2
22.05
-
Average Memory Access Time
11.17
-
Cache Address Mapping: Direct Mapping 1
17.21
-
Cache Address Mapping: Direct Mapping 2
13.02
-
Cache Address Mapping: Direct Mapping 3
8.46
-
Cache Address Mapping: Set Associative Mapping 1
16.11
-
Knapsack Problem by Greedy Method Part 1
17.58
-
Knapsack Problem by Greedy Method Part 2
18.1
-
Optimal Merge Patterns
13.07
-
Job Sequencing with Deadlines
28.54
-
Cache Address Mapping: Set Associative Mapping 2
7.34
-
Cache Address Mapping: Set Associative Mapping 3
8.28
-
Associative Mapping
15.28
-
Writing into Cache
8.38
-
Cache Initialization
4.54
-
Virtual Memory 1
9.22
-
Virtual Memory 2
12.33
-
Virtual Memory 3
24.22
-
Minimum Cost Spanning Tree of a Graph Using Kruskal's Algorithm Part 1
17.01
-
Minimum Cost Spanning Tree of a Graph Using Kruskal's Algorithm Part 2
8.44
-
Minimum Cost Spanning Tree of a Graph Using Prim's Algorithm Part 1
21.3
-
Minimum Cost Spanning Tree of a Graph Using Prim's Algorithm Part 2
15.26
-
Virtual Memory 4
9.18
-
Memory Management System
10.11
-
Memory Gate Question 1
7.11
-
Memory Gate Question 2
4.53
-
Memory Gate Question 3
7.33
-
Memory Gate Question 4
13.06
-
Memory Gate Question 5
14.58
-
Memory Gate Question 6
9
-
Gate Questions on Graph Part 1
17
-
Gate Questions on Graph Part 2
13.51
-
Gate Questions on Graph Part 3
12.38
-
Gate Questions on Graph Part 4
19.39
-
Memory Gate Question 7
10.18
-
Memory Gate Question 8
5.09
-
Memory Gate Question 9
7.52
-
Memory Gate Question 10
3.12
-
Memory Gate Question 11
6.42
-
Memory Gate Question 12
4.05
-
Memory Gate Question 13
10.12
-
Memory Gate Question 14
3.59
-
Prim's Algorithm
19.07
-
Shortest Distance Algorithm Part 1
25.23
-
Shortest Distance Algorithm Part 2
15.18
-
Huffman Coding for Data Compression
20.09
-
Gate Question on Huffman Coding
12.45
-
Memory Gate Question 15
3.13
-
Memory Gate Question 16
3.56
-
Memory Gate Question 17
17.18
-
Memory Gate Question 18
8.56
-
Memory Gate Question 19
3.57
-
Memory Gate Question 20
24.49
-
Memory Gate Question 21
7.12
-
Memory Gate Question 22
9.29
-
Dynamic Algorithm Introduction
10.45
-
All Pair Shortest Path Algorithm Part 1
14.51
-
All Pair Shortest Path Algorithm Part 2
12.07
-
LCS Problem
29.08
-
Memory Gate Question 23
8.53
-
Memory Gate Question 24
4.54
-
Memory Gate Question 25
4.44
-
Memory Gate Question 26
8.15
-
Memory Gate Question 27
6.07
-
Associative Mapping
13.32
-
Bellman Ford Algorithm Part 1
27.21
-
Bellman Ford Algorithm Part 2
20.5
-
Matrix Chain Multiplication Part 1
14.32
-
Matrix Chain Multiplication Part 2
29.46
-
Introduction to Pipelining: Throughput
8.48
-
Introduction to Pipelining: Parallel Processing
11.55
-
Data Pipeline 1
10.04
-
Data Pipeline 2
18.26
-
Speed Up
23.01
-
Speed Up Example
6.02
-
Instruction Pipeline 1
13.14
-
Matrix Chain Multiplication Part 3
23.59
-
Multistage Graph Part 1
10.02
-
Multistage Graph Part 2
28.58
-
Instruction Pipeline 2
11.25
-
Hazards in Pipeline 1
8.29
-
Hazards in Pipeline 2
9.4
-
Hazards in Pipeline 3
8.5
-
Handling Hazards 1
6.16
-
Knapsack Problem Using Dynamic Method Part 1
25.5
-
Knapsack Problem Using Dynamic Method Part 2
20.27
-
Travelling Salesman Problem Introduction
19.03
-
Travelling Salesman Problem Using Dynamic Method
37.05
-
Handling Hazards 2
14.46
-
Handling Hazards 3
6.15
-
Handling Hazards 4
18.17
-
Important Formulae
12.43
-
Example 1
6.13
-
Pipelining Gate Question 1
8.51
-
N-Queen Problem Part 1
22.05
-
N-Queen Problem Part 2
29.57
-
N Queen Problem Part 3
34.13
-
Pipelining Gate Question 2
3.43
-
Pipelining Gate Question 3
22.3
-
Pipelining Gate Question 4
19.13
-
Pipelining Gate Question 5
3.41
-
Pipelining Gate Question 6
4.38
-
Pipelining Gate Question 7
6.41
-
Pipelining Gate Question 8
8.02
-
Pipelining Gate Question 9
13.5
-
Graph Color Problem Part 1
15.55
-
Graph Color Problem Part 2
11.08
-
Graph Color Problem Part 3
13.27
-
Hamiltonion Cycle Problem Part 1
12.02
-
Hamiltonion Cycle Problem Part 2
21.19
-
Pipelining Gate Question 10
5.04
-
Pipelining Gate Question 11
6.29
-
Pipelining Gate Question 12
6.52
-
Pipelining Gate Question 13
4.29
-
Pipelining Gate Question 14
9.05
-
Pipelining Gate Question 15
5.03
-
Pipelining Gate Question 16
9.28
-
P and NP Class Problems
17.35
-
Decision Problem and Optimization Problem
13.3
-
Reducing One Problem to Other Problem
26.59
-
NP Hard and NP Complete
18.35
-
Prove that a Clique Problem is NP Complete Part 1
6.51
-
IO Organization Introduction
12.54
-
Interface Design
28.24
-
Bus System Design : Distinct IO
7.34
-
Bus System Design : Isolated IO
7.48
-
Bus System Design : Memory Mapped IO
6.31
-
Asynchronous Parallel Transfers
20.58
-
Asynchronous Serial Transfers
10.12
-
Types Of Errors And Baud Rate
12.57
-
Prove that a Clique Problem is NP Complete Part 2
27.35
-
Gate Questions on NP Completeness Part 1
13.51
-
Gate Questions on NP Completeness Part 2
5.2
-
Modes Of Transfers Programmed IO
17.4
-
Modes Of Transfers Interrupt initiated
14.43
-
Types of Interrupts 1
13.48
-
Types of Interrupts 2
8.04
-
Hash Search Introduction
25.05
-
Hash Search Collision Handling
13.18
-
Different Methods of Hashing
19.25
-
Exercise on Hash Search
8.21
-
Gate Questions on Hash Search Part 1
20.54
-
Vectored Interrupts
13.32
-
Priority Interrupts 1
17.28
-
Priority Interrupts 2 : parallel Priorities
24.06
-
DMA 1
10.12
-
DMA Controller
22.07
-
IO Organization GATE Question 1
8.59
-
IO Organization GATE Question 2
6.43
-
IO Organization GATE Question 3
3.1
-
IO Organization GATE Question 4
8.52
-
IO Organization GATE Question 5
8.45
-
IO Organization GATE Question 6
6.35
-
IO Organization GATE Question 7
6.36
-
IO Organization GATE Question 8
4.4
-
IO Organization GATE Question 9
4.5
-
Gate Questions on Hash Search Part 2
6.33
-
Gate Questions on Hash Search Part 3
11.32
-
What is Compiler
1.4
-
Analysis and Synthesis Model
4.29
-
Language Processor-I
6.23
-
Language Processor-II
5.08
-
Phases of Compiler
3.59
-
Lexical Analysis
3.51
-
Syntax Analysis
4.01
-
Grammar
6.31
-
Introduction
6.25
-
Computer System Organization
16.16
-
Computer System Structure
5.07
-
Definition of Operating System
15.17
-
Proposition and Logical Connectives
42.05
-
Logical Equivalences-1
28.32
-
Logical Equivalences-2
33.18
-
Normal Forms
32.26
-
Responsibility of Operating System
18.16
-
Properties of Operating System
3.47
-
Batch Processing System
7.02
-
Spooling
7.25
-
Semantic Analysis-I
5.45
-
Semantic Analysis-II
2.09
-
Intermediate Code Generation
3.53
-
Code Optimization
5.03
-
Code Generation
4.13
-
Lexical Analyzer
2.17
-
Responsibility of Lexical Analysis
4.39
-
Token Pattern and Lexemes
8.42
-
Multiprogramming
7.11
-
Multitasking
7.37
-
Real Time and Distributed System
5.09
-
User Mode and Kernel Mode
12.02
-
Operating System Services
4.11
-
System Call
3.43
-
Predicates and Quantifiers
39.02
-
Nested Quantifiers
39.02
-
C and C ++ Tokens
8.36
-
Specification of Token
1.26
-
Basic of String and Language
7.04
-
Deterministic Finite State Machine
16.4
-
Properties of Nested Quantifiers
41.05
-
English to Logical Statements Conversion
31.2
-
Topic Covered
4.3
-
Definition of Process
5.51
-
Memory Layout
7.08
-
Process Creation and Termination Command
8.52
-
Fork Command Example
5.33
-
Fork Command GATE Question Part-I
6.19
-
Fork Command GATE Question Part-ll
5.11
-
NFA
9.19
-
Regular Expression
10.17
-
Finite Automata for Token Generation
4.32
-
Context Free Grammar
4.2
-
Derivation and Parse Tree
3.54
-
Sentential Form
2.41
-
Problem Solving on Process State Transition Diagram
12.26
-
Process State Transition Diagram
17.19
-
Context Switching
10.56
-
Argument
20.14
-
Rules of Inferences for Propositional Logic
33.28
-
Syntax of Programming Language
14.52
-
Leftmost and Rightmost Derivation
6.44
-
Ambiguous Grammar
5.11
-
Associativity of Operator
10.02
-
Rules of Inferences for Quantified statements
30.19
-
Logical Reasoning
32.24
-
Schedulers
23.55
-
Thread
27.12
-
Problem Solving Thread
13.53
-
Precedence of Operator
8.31
-
Left Recursion
3.58
-
Removal of Left Recursion
9.16
-
Indirect Left Recursion
10.14
-
Left Factoring of Grammar
4.59
-
Non Context Free Grammar
5.01
-
Scheduling Policies and Optimization Criteria
10.32
-
FCFS Scheduling Policy
9.21
-
Convoy Effect
5.33
-
SJF Scheduling Algorithm
13.26
-
Basics of Permutation and Combinations
36.51
-
Combinations
40.2
-
Parsing
6.14
-
Top Down Parsing
4.26
-
Recursive Descent Parser
6.44
-
Predictive Parsing
18.52
-
Permutations
40.55
-
Division/Distribution into Groups
33.32
-
Shortest Remaining Time First
9.36
-
Dynamic Prediction for SJF
13.33
-
Highest Response Time Next
5.51
-
Priority Based Scheduling
12.26
-
LL(1) Grammar
3.47
-
Non Recursive Predictive Parser
4.05
-
First Set Calculation
12.26
-
First Set Example
9.11
-
Follow Set
17.12
-
Round Robin Scheduling Policy
12.23
-
Multilevel Feedback Queue
7.31
-
Pigeonhole Principle
19.02
-
Dearrangement and Inclusion-Exclusion Principle
21.01
-
Distribution of Identical Objects-1
37.51
-
Independent and Cooperating Process
8.31
-
Inconsistency Due to Lack of Synchronization
12.18
-
Predictive Parsing
4.22
-
Non-Recursive Predictive Parsing Algorithm
10.13
-
Identifying LL(1) Grammar
8.26
-
Bottom up Parsing
7.2
-
Handle
5.24
-
Distribution of Identical Objects-2
32.43
-
Summation
32.56
-
Race Condition and Critical Section
8.53
-
Synchronization Mechanism
7.25
-
Two Process Solution
20.3
-
Peterson Solution
12.14
-
LR Parser
4.19
-
LR(0) Items
4.57
-
Closure Operation
7.07
-
Go-to Operation
5.14
-
Augmented Grammar
4.44
-
LR(0) Collection
8.39
-
Common Mistake in LR(0) Collection- I
6.12
-
Binomial Expansions and Binomial Identities
21.03
-
Generating Function
30.03
-
Properties of Generating Functions
34.53
-
Bakery Algorithm
9.17
-
Bakery Algorithm Part-II
10.26
-
Synchronization Hardware
13.39
-
Common Mistake in LR(0) Collection- II
7.15
-
Construction of LR(0) Parsing Table Example-I
7.37
-
Construction of LR(0) Parsing Table Example-II
6.16
-
Shift-Reduce Conflict
9.17
-
LR Parsing Model
3.38
-
Application of Generating Function
39.02
-
Recurrence Relation
39.59
-
GATE Question Solution Semaphore
27.1
-
Producer Consumer Solution Using Semaphore
7.22
-
Readers Writers Problem
10.18
-
LR Parsing Algorithm
6.3
-
LR Parsing Algorithm Demonstration
8.41
-
SLR
9.29
-
Construction of SLR Parsing Table Example-I
7.11
-
Construction of SLR Parsing Table Example-II
4.22
-
Recurrence Relation Solving Techniques -1
22.04
-
Recurrence Relation Solving Techniques -2
31.55
-
Problem Solving on Recurrence Relation
28.19
-
Dining Philosophers Problem
8.35
-
Concurrent Execution Bernstein's Conditions
10.29
-
Fork and Join Construct
7.2
-