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GATE Computer Engineering (Batch 4)

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  • Lock-Btn

    Introduction to Number System

    10.55
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    Number System Conversion

    24.04
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    Numericals Based on Number System-Part 1

    21.36
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    Numericals Based on Number System-Part 2

    18.14
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    Complement Number Representation

    19.31
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    Structure of C Program

    5.02
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    Installing Atom

    5.51
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    Basics of printf

    9.55
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    Variables and Datatypes

    18.26
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    Basics of scanf

    9.09
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    Math operators in C

    11.28
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    Program Example 1

    8.33
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    Program Example 2

    13.09
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    Signed Number Representation for Binary

    32
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    Important Properties of 1's and 2's Complement Numbers

    17.43
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    Concept of Overflow and Sign Extension

    18.52
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    Subtraction Using R's and (R-1)'s Complement Method

    34.04
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    Program Example 3

    5.15
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    Increment and Decrement Operators

    22.13
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    More on Increment and Decrement Operators

    19.11
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    Bitwise Operators

    17.23
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    Binary Codes

    30.06
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    Generation of Gray Code

    14.41
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    Conversion of Binary to Gray and Gray to Binary Codes

    12.57
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    Gate Numerical on Number System Part 1

    28
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    Gate Numerical on Number System Part 2

    25.07
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    for loop

    18.27
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    while loop

    11.41
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    if else statement

    5
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    nested if else

    7.11
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    Logical Operators

    10.51
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    Switch Case Part 1

    11.07
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    Switch Case Part 2

    13.36
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    Boolean Laws

    25.16
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    Concept of Minterms and Maxterm

    22.32
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    Problems Based on Minterms and Maxterms

    32.37
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    Complementing the Function

    11.25
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    Ternary Operator

    7.22
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    do while loop

    9.43
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    Practice Questions on Control Structures Part 1

    26.3
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    Gate 2015 Question on Control Structures

    10.37
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    Gate 2017 Question on Control Structures

    13.31
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    Practice Questions on Control Structures Part 2

    15.3
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    Practice Questions on Control Structures Part 3

    14.03
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    Introduction to K-Map

    15.49
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    Grouping Techniques in K-Map

    31.56
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    Numerical Based on Boolean Algebra

    28.24
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    Functions Introduction

    16.21
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    Function Calls in Detail

    7.02
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    Programming Example of Function

    12.42
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    Function Definition and Function Declaration

    19.03
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    Types of Functions Void and Non Void

    4.57
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    Example of Void Function

    10.25
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    Storage Class Auto

    16.27
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    Basic Logic Gates

    6.26
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    Universal Logic Gates

    16.25
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    Numericals Based on Universal Logic Gates

    22.3
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    Ex-OR Gate

    13.37
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    Important Properties of Ex-OR Gate

    20.02
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    Gate Numericals on Logic Gates

    36.04
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    Register Storage Class

    13.45
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    Static Storage Class

    21.29
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    Local Parameter of Function

    14.38
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    Example 1 on Storage Class

    10.2
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    Example 2 on Storage Class

    10.12
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    Example 3 on Storage Class

    10.56
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    Example 4 on Storage Class

    11.1
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    Gate 2012 Question on Storage Class

    11.05
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    Introduction to Combinational Logic Circuit

    11.24
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    Half Adder

    7.14
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    Half Subtractor

    7.17
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    Full Adder

    12.23
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    Implementing Full Adder with Half Adder

    10.46
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    Concept of Comparator

    20.47
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    4-Bit Parallel/ Ripple Adder

    15.55
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    4-Bit Serial Adder

    18.46
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    Gate 2019 Question on Storage Class

    9.18
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    Recursive Functions Introduction

    17.07
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    Recursive Function Find Sum of First N Natural Numbers

    5.12
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    4-Bit Adder/ Subtractor

    11.03
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    Encoder

    8.11
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    Decoder

    11.36
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    Full Adder Using 3:8 Decoder

    14.56
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    Decoder Expansion

    17.34
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    Concept of Demultiplexer

    7.37
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    Decoder Using Demultiplexer

    6.35
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    Concept of Multiplexer

    8.47
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    Multiplexer Expansion

    14.4
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    Recursive Function to Find X Raise to Y

    9.53
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    Recursive Function to Find Fibonacci Number

    9.14
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    Recursive Function for Decimal to Binary

    19.31
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    Recursive Function to Convert Decimal to Hexadecimal

    14.48
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    Practice Question on Recursion

    5.27
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    Gate 2018 Question on Recursion

    11.31
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    Gate 2017 Question on Recursion

    13.32
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    Gate 2016 Question on Recursion

    9.08
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    Gate 2019 Question on Recursion

    6.03
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    Implementing 2:1 Mux Using 4:1 Mux

    8.4
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    2:1 Multiplexer as Universal Logic Circuit

    16.03
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    4:1 Multiplexer as Universal Logic Gate

    5.52
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    Gate Problems on Mux, Decoder and Decoder

    29.13
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    Introduction to Sequential Logic Circuit

    14.44
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    NOR Latch

    14.54
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    NAND Latch

    10.32
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    Pointers Fundamentals

    18.5
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    Data Type of Pointer

    18.49
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    Demonstration of Pointers Using C Program

    13.13
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    Example Program 1 on Pointers

    9.23
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    Example Program 2 on Pointers

    13.33
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    Example Program 3 on Pointers

    11.55
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    Passing Address to Function Call by Address

    10.17
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    Problem with RS Latch

    17.43
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    Delay Latch/Flip Flop

    4.49
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    JK Latch and T- Latch

    7.48
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    Excitation Table for all Latches/Flip Flops

    19.52
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    Latch/Flip Flop Conversion Concept

    23.22
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    SR Latch to JK Latch Conversion

    18.09
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    Call by Address Example 1

    13.21
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    Call by Address Example 2

    10.19
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    Swapping Value of Two Variables Using Call by Address

    7.08
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    Gate 2015 Question on Pointers

    8.04
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    Gate 2016 Question on Pointers

    11.16
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    Relation Between Array and Pointer - Part 1

    18.54
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    Relation Between Array and Pointer - Part 2

    10.43
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    D Latch to JK Latch Conversion

    8.58
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    D Latch to T Latch Conversion

    6.46
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    Concept of Triggering

    14.17
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    Difference between Latch and Flipflop

    10.59
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    Behaviour of Flip Flop in Toggle Mode

    13.19
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    Race Around Condition in JK Latch

    14.44
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    Master-Slave JK Flip Flop

    9.03
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    Introduction to Shift Register

    9.17
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    Traverse Array by Using Pointer

    15.2
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    GATE 2019 Question on Array and Pointers - Part 1

    4.47
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    GATE 2019 Question on Array and Pointers - Part 2

    10.56
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    Pass Array to Function

    17.58
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    Creating Variables Using Malloc

    27.17
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    Create Array Using Malloc

    17.07
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    Demonstration Program for Creating Array Using Pointer

    7.27
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    Two Dimension and Pointer

    25.32
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    Classification of Shift Register

    28.48
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    Ring Counter

    17.46
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    Twisted Ring Counter

    14.12
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    Introduction to Asynchronous Counter

    10.03
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    Asynchronous Up Counter

    15.14
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    Asynchronous Down Counter

    19.45
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    Demonstration Program of 2-Dimension Array and Pointers

    11.08
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    Pointer to Pointer

    7.58
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    Pointer to Function

    18.02
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    GATE 2003 Question on Pointer

    12.09
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    Gate 2003 Question on Pointer - Part 2

    9.59
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    Gate 2000 Question on Pointer

    15.31
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    Asynchronous Up/Down Counter

    14.1
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    Introduction To Asynchronous MOD Counter

    17.3
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    Designing Asynchronous MOD 10 Counter

    11.53
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    Introduction to Synchronous Counter

    11.55
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    Designing Synchronous Counter_ Part 1

    12.59
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    Designing Synchronous Counter_ Part 2

    15.03
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    Finite State Machine

    10.45
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    Char Datatype Fundamentals

    19.35
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    String Fundamentals Part 01

    5.47
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    String Functions Part 01

    12.56
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    Array of Char and Pointers

    11.47
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    Gate 2011 Question on Array of Char

    9.4
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    GATE 2002, 2008, 2017 Question on Array of Char

    21.37
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    Gate 2017 Question on Array of Char

    8.42
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    Non Overlapping Sequence Detector

    16.52
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    Overlapping Sequence Detector

    28.48
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    Gate Numericals Based on Sequential Logic Circuit

    33.18
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    Gate Numericals on FSM

    22.36
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    Structure Fundamental - Part 01

    20.57
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    Structure Fundamental - Part 02

    4.1
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    Structure Declaration Using Typedef

    5.22
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    Initialize a Structure

    10.37
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    Demonstration Program on Structures

    8.23
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    Pointer to Structure

    19.39
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    Gate 2018 Question on Structures

    10.34
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    Self Referential Structure

    19.05
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    Data Structure Introduction

    10.52
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    Comparison of Link List with Arrays

    18.38
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    Types of Link List

    6.47
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    Singly Link List Program Part 1

    44.1
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    Singly Link List Program Part 2

    12.53
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    Singly Link List Program Part 3

    31.34
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    Circular Link List Program Part 1

    26.14
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    Circular Link List Program Part 2

    15.46
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    Doubly Link List Program Part 1

    33.09
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    Doubly Link List Program Part 2

    10.21
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    Doubly Link List Program Part 3

    5.57
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    Doubly Link List Program Part 4

    18.33
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    Print Singly Link List in Reverse Order

    18.06
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    Convert Singly Link List in Reverse Order

    19.07
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    Gate Questions on Link List Part 1

    34.29
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    Gate Questions on Link List Part 2

    16.4
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    Binary Search Tree Fundamentals

    33.22
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    Terms Used in Binary Tree

    17.51
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    Stack Data Structure

    22.14
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    Linear Queue Using Array

    29.49
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    Circular Queue Using Array

    23.17
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    Queue Using Link List

    17.05
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    Binary Tree Program to Insert Node

    35.33
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    Binary Tree Traversal

    28.23
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    Recursive Functions for Inorder Preorder and Postorder Part 1

    35.15
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    Count Leaf Nodes in a Binary Tree

    31.12
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    Count Number of Non Leaf Nodes in Binary Tree

    16.51
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    Construct Binary Tree from Traversal Outputs

    34.52
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    Delete a Node from Binary Tree

    29.28
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    Gate 1995, 1996 Questions on Binary Tree

    9.17
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    Gate 1997, 1998, 2000 Question on Binary Tree

    21.07
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    Gate 2018 Question on Binary Tree

    6.29
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    Multiway Search Tree Part 1

    32.24
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    Multiway Search Tree Part 2

    30.35
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    Multiway Search Tree Part 3

    13.01
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    AVL tree introduction

    25.31
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    Rotation algorithm for AVL tree

    16.07
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    Multiway Search Tree Part 4

    7.21
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    B+ Tree

    21.28
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    Construction of B+ Tree

    22.24
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    Application of B+ Tree

    9.29
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    Gate Questions on Multiway Tree

    28.54
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    Construction of AVL Tree Example 1

    20.57
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    Construction of AVL Tree Example 2

    22.18
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    Infix, Prefix and Postfix Notation

    33.01
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    Expression Tree

    15.21
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    Algorithm to Evaluate Postfix Expression

    22.4
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    Binary Heap Introduction

    25.09
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    Construction of Max Heap Part 1

    29.34
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    Infix to Postfix Conversion Algorithm Part 1

    47.22
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    Infix to Postfix Conversion Algorithm Part 2

    7.51
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    Gate Questions on Expression Evaluation

    29.41
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    Gate 2018 Question on Expression Tree

    10.18
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    Construction of Max Heap Part 2

    6.13
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    Gate 2009 2014 2001 2015 Question on Binary Heap

    19.57
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    Gate 2011 2009 Question on Binary Heap

    7.19
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    Graph Fundamentals

    28.05
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    DFS Graph Traversal

    26.13
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    BFS Graph Traversal

    13.39
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    DFS algorithm

    34.12
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    BFS algorithm

    34.23
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    Types of edges in DFS traversal

    30.08
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    Gate 2006 Question 1 on DFS Traversal

    9.5
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    Gate 2008 Question on DFS Traversal

    6.32
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    Introduction Registered Organisation Memory Basics

    24.51
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    Introduction to Register Set

    17.34
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    Single Accumulator Organization : Size 1

    18.39
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    Comparison of Algorithm and Program

    13.14
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    Characteristics of Algorithm

    10.25
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    How to Write Algorithm

    8.38
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    How to Analyse Algorithm

    10.26
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    Analyze Algorithm by Frequency Count Method Part 1

    14.05
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    Analyze Algorithm by Frequency Count Method Part 2

    21.31
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    Analyze Algorithm by Frequency Count Method Part 3

    10.26
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    Single Accumulator Organization : Purpose 2

    26.5
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    Single Accumulator Organization : Connections 3

    21.41
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    General Register Organization 1

    17.34
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    General Register Organization 2

    14.23
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    Classes of Functions and Growth Rate

    9.31
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    Asymptotic Notation Part 1

    31.03
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    Asymptotic Notation Part 2

    12.06
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    Asymptotic Notation Part 3

    14.5
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    General Register Organization 3

    8.11
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    Flag Register

    23.16
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    Stack Organization 1

    29.07
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    Properties of Asymptotic Notations

    21.05
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    Exercises Using Properties of Asymptotic Notations - Part 1

    10.29
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    Exercises Using Properties of Asymptotic Notations - Part 2

    14.57
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    Comparing Functions

    31.08
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    Best Case, Worst Case and Average Case of Algorithm

    20.29
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    Stack Organization 2

    9.35
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    Instruction Cycle 1

    11.52
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    Instruction Cycle 2

    15.14
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    Instruction Cycle 3

    12.01
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    Instruction Formats : Number of Operands 1

    16.2
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    Recurrence Relation for Decreasing Function Part 1

    18.24
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    Recurrence Relation for Decreasing Function Part 2

    16.59
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    Recurrence Relation for Decreasing Function Part 3

    16.4
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    Summary of Decreasing Function

    27.42
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    Instruction Formats : Number of Operands 2

    15.41
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    Instruction Formats : Number of Operands 3

    14.53
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    Instruction Formats : Location of the Operand 1

    10.29
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    Instruction Formats : Location of the Operand 2

    17.59
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    Tree Method to Analyze Recurrence Relation

    25.56
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    Recurrence Relation for Dividing Function Part 1

    15.46
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    Recurrence Relation for Dividing Function Part 2

    10.23
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    Recurrence Relation for Dividing Function Part 3

    14.08
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    Recurrence Relation for Dividing Function Part 4

    14.33
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    Instruction Formats : Location of the Operand 3

    16.54
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    Instruction Formats : Location of the Operand 4

    16.5
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    Instruction Formats : Sub Routine Call and Return

    22.31
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    Instruction Formats : Register Reference Instructions

    23.25
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    Instruction Formats : I O Reference Instructions

    11.28
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    Master's Theorem

    18.24
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    Exercises Solved Using Master's Theorem

    12.5
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    More Examples of Recurrence Relations Part 1

    15.41
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    More Examples of Recurrence Relations Part 2

    9.46
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    Types of Instructions1

    18.57
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    Types of Instructions2

    14.59
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    Types of Instructions 3

    13.2
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    Binary Search Fundamentals

    26.36
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    Binary Search Non Recursive Algorithm

    21.57
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    Binary Search Recursive Algorithm

    18.38
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    Gate Questions on Binary Search

    25.5
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    Addressing Modes 1

    16.08
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    Addressing Modes 2

    15.49
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    Addressing Modes 3

    17.53
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    Control Unit 1

    12
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    Control Unit 2

    17.22
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    Merge Sort Part 1

    28.5
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    Merge Sort Part 2

    32.16
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    Control Unit 3

    22.29
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    ALU Design 1

    16.47
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    ALU Design 2

    15.08
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    ALU Design 3

    28.02
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    Time Complexity of Merge Sort

    17.02
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    Quick Sort Part 1

    22.3
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    Quick Sort Part 2

    19.33
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    Model Gate Question On Instruction size

    15.46
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    GATE Question 1

    5.41
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    GATE Question 2

    6.43
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    GATE Question 3

    5.02
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    GATE Question 4

    4.1
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    GATE Question 5

    7.41
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    GATE Question 6

    8.1
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    GATE Question 7

    20.15
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    Quick Sort Part 3

    24.09
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    Quick Sort Part 4

    12.11
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    Time Complexity of Quick Sort

    19.24
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    Comparision of Merge Sort and Quick Sort

    15.1
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    GATE Question 8

    14.13
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    GATE Question 9

    11.13
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    GATE Question 10

    5.12
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    GATE Question 11

    12.13
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    GATE Question 12

    4.38
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    GATE Question 13

    9.55
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    GATE Question 14

    3.23
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    GATE Question 15

    5.08
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    GATE Question 16

    10.57
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    GATE Question 17

    10.05
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    GATE Question 18

    9.1
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    GATE Question 19

    11.34
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    GATE Question 20

    13.58
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    Gate Questions on Quick Sort Part 1

    20.11
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    Gate Questions on Quick Sort Part 2

    9.4
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    Gate Questions on Quick Sort Part 3

    13.45
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    Introduction To Memory Hierarchy (Part 1)

    18.24
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    Introduction To Memory Hierarchy (Part 2)

    8.45
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    Introduction to RAM and ROM

    18.43
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    Memory Address Mapping 1

    26.2
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    Bubble Sort

    23.46
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    Selection Sort

    25.39
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    Insertion Sort Part 1

    15.43
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    Insertion Sort Part 2

    13.38
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    Memory Address Mapping 2

    22.56
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    Memory Address Mapping 3

    7.57
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    Memory Address Mapping 4

    8.01
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    Memory Address Mapping 5

    6.17
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    Locality of Reference 1

    14.27
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    Locality of Reference 2

    7.47
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    Fundamentals of Heap

    18.31
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    Stage 1 of Heap Sort

    21.37
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    Stage 2 of Heap Sort

    12.35
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    Analysis of Heap Sort Part 1

    14.11
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    Analysis of Heap Sort Part 2

    22.05
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    Average Memory Access Time

    11.17
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    Cache Address Mapping: Direct Mapping 1

    17.21
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    Cache Address Mapping: Direct Mapping 2

    13.02
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    Cache Address Mapping: Direct Mapping 3

    8.46
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    Cache Address Mapping: Set Associative Mapping 1

    16.11
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    Knapsack Problem by Greedy Method Part 1

    17.58
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    Knapsack Problem by Greedy Method Part 2

    18.1
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    Optimal Merge Patterns

    13.07
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    Job Sequencing with Deadlines

    28.54
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    Cache Address Mapping: Set Associative Mapping 2

    7.34
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    Cache Address Mapping: Set Associative Mapping 3

    8.28
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    Associative Mapping

    15.28
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    Writing into Cache

    8.38
  • Lock-Btn

    Cache Initialization

    4.54
  • Lock-Btn

    Virtual Memory 1

    9.22
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    Virtual Memory 2

    12.33
  • Lock-Btn

    Virtual Memory 3

    24.22
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    Minimum Cost Spanning Tree of a Graph Using Kruskal's Algorithm Part 1

    17.01
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    Minimum Cost Spanning Tree of a Graph Using Kruskal's Algorithm Part 2

    8.44
  • Lock-Btn

    Minimum Cost Spanning Tree of a Graph Using Prim's Algorithm Part 1

    21.3
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    Minimum Cost Spanning Tree of a Graph Using Prim's Algorithm Part 2

    15.26
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    Virtual Memory 4

    9.18
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    Memory Management System

    10.11
  • Lock-Btn

    Memory Gate Question 1

    7.11
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    Memory Gate Question 2

    4.53
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    Memory Gate Question 3

    7.33
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    Memory Gate Question 4

    13.06
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    Memory Gate Question 5

    14.58
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    Memory Gate Question 6

    9
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    Gate Questions on Graph Part 1

    17
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    Gate Questions on Graph Part 2

    13.51
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    Gate Questions on Graph Part 3

    12.38
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    Gate Questions on Graph Part 4

    19.39
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    Memory Gate Question 7

    10.18
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    Memory Gate Question 8

    5.09
  • Lock-Btn

    Memory Gate Question 9

    7.52
  • Lock-Btn

    Memory Gate Question 10

    3.12
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    Memory Gate Question 11

    6.42
  • Lock-Btn

    Memory Gate Question 12

    4.05
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    Memory Gate Question 13

    10.12
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    Memory Gate Question 14

    3.59
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    Prim's Algorithm

    19.07
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    Shortest Distance Algorithm Part 1

    25.23
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    Shortest Distance Algorithm Part 2

    15.18
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    Huffman Coding for Data Compression

    20.09
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    Gate Question on Huffman Coding

    12.45
  • Lock-Btn

    Memory Gate Question 15

    3.13
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    Memory Gate Question 16

    3.56
  • Lock-Btn

    Memory Gate Question 17

    17.18
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    Memory Gate Question 18

    8.56
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    Memory Gate Question 19

    3.57
  • Lock-Btn

    Memory Gate Question 20

    24.49
  • Lock-Btn

    Memory Gate Question 21

    7.12
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    Memory Gate Question 22

    9.29
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    Dynamic Algorithm Introduction

    10.45
  • Lock-Btn

    All Pair Shortest Path Algorithm Part 1

    14.51
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    All Pair Shortest Path Algorithm Part 2

    12.07
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    LCS Problem

    29.08
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    Memory Gate Question 23

    8.53
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    Memory Gate Question 24

    4.54
  • Lock-Btn

    Memory Gate Question 25

    4.44
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    Memory Gate Question 26

    8.15
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    Memory Gate Question 27

    6.07
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    Associative mapping

    13.32
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    Bellman Ford Algorithm Part 1

    27.21
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    Bellman Ford Algorithm Part 2

    20.5
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    Matrix Chain Multiplication Part 1

    14.32
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    Matrix Chain Multiplication Part 2

    29.46
  • Lock-Btn

    Introduction to Pipeling: Throughput

    8.48
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    Introduction to Pipeling: Parallel Processing

    11.55
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    Data Pipeline 1

    10.04
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    Data Pipeline 2

    18.26
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    Speed Up

    23.01
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    Speed Up Example

    6.02
  • Lock-Btn

    Instruction Pipeline 1

    13.14
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    Matrix Chain Multiplication Part 3

    23.59
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    Multistage Graph Part 1

    10.02
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    Multistage Graph Part 2

    28.58
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    Instruction Pipeline 2

    11.25
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    Hazards in Pipeline 1

    8.29
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    Hazards in Pipeline 2

    9.4
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    Hazards in Pipeline 3

    8.5
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    Handling Hazards 1

    6.16
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    Knapsack Problem Using Dynamic Method Part 1

    25.5
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    Knapsack Problem Using Dynamic Method Part 2

    20.27
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    Travelling Salesman Problem Introduction

    19.03
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    Travelling Salesman Problem Using Dynamic Method

    37.05
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    Handling Hazards 2

    14.46
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    Handling Hazards 3

    6.15
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    Handling Hazards 4

    18.17
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    Important Formulae

    12.43
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    Example 1

    6.13
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    Pipelining Gate Question 1

    8.51
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    N-Queen Problem Part 1

    22.05
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    N-Queen Problem Part 2

    29.57
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    N Queen Problem Part 3

    34.13
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    Pipelining Gate Question 2

    3.43
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    Pipelining Gate Question 3

    22.3
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    Pipelining Gate Question 4

    19.13
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    Pipelining Gate Question 5

    3.41
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    Pipelining Gate Question 6

    4.38
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    Pipelining Gate Question 7

    6.41
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    Pipelining Gate Question 8

    8.02
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    Pipelining Gate Question 9

    13.5
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    Graph Color Problem Part 1

    15.55
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    Graph Color Problem Part 2

    11.08
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    Graph Color Problem Part 3

    13.27
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    Hamiltonion Cycle Problem Part 1

    12.02
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    Hamiltonion Cycle Problem Part 2

    21.19
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    Pipelining Gate Question 10

    5.04
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    Pipelining Gate Question 11

    6.29
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    Pipelining Gate Question 12

    6.52
  • Lock-Btn

    Pipelining Gate Question 13

    4.29
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    Pipelining Gate Question 14

    9.05
  • Lock-Btn

    Pipelining Gate Question 15

    5.03
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    Pipelining Gate Question 16

    9.28
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    P and NP class problems

    17.35
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    Decision Problem and Optimization Problem

    13.3
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    Reducing One Problem to Other Problem

    26.59
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    NP Hard and NP Complete

    18.35
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    Prove that a Clique problem is NP Complete Part 1

    6.51
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    IO Organization Introduction

    12.54
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    Interface Design

    28.24
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    Bus System Design : Distinct IO

    7.34
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    Bus System Design : Isolated IO

    7.48
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    Bus System Design : Memory Mapped IO

    6.31
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    Asynchronous Parallel Transfers

    20.58
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    Asynchronous Serial Transfers

    10.12
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    Types Of Errors And Baud Rate

    12.57
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    Prove that a Clique problem is NP Complete Part 2

    27.35
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    Gate questions on NP Completeness Part 1

    13.51
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    Gate questions on NP Completeness Part 2

    5.2
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    Modes Of Transfers Programmed IO

    17.4
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    Modes Of Transfers Interrupt initiated

    14.43
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    Types of Interrupts 1

    13.48
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    Types of Interrupts 2

    8.04
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    Hash Search Introduction

    25.05
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    Hash Search Collision Handling

    13.18
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    Different Methods of Hashing

    19.25
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    Exercise on Hash Search

    8.21
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    Gate Questions on Hash Search Part 1

    20.54
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    Vectored Interrupts

    13.32
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    Priority Interrupts 1

    17.28
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    Priority Interrupts 2 : parallel Priorities

    24.06
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    DMA 1

    10.12
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    DMA Controller

    22.07
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    IO Organization Gate Question 1

    8.59
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    IO Organization Gate Question 2

    6.43
  • Lock-Btn

    IO Organization Gate Question 3

    3.1
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    IO Organization Gate Question 4

    8.52
  • Lock-Btn

    IO Organization Gate Question 5

    8.45
  • Lock-Btn

    IO Organization Gate Question 6

    6.35
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    IO Organization Gate Question 7

    6.36
  • Lock-Btn

    IO Organization Gate Question 8

    4.4
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    IO Organization Gate Question 9

    4.5
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    Gate Questions on Hash Search Part 2

    6.33
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    Gate Questions on Hash Search Part 3

    11.32
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    What is Compiler

    1.4
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    Analysis and Synthesis Model

    4.29
  • Lock-Btn

    Language Processor-I

    6.23
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    Language Processor-II

    5.08
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    Phases of Compiler

    3.59
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    Lexical Analysis

    3.51
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    Syntax Analysis

    4.01
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    Grammar

    6.31
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    Introduction

    6.25
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    Computer System Organization

    16.16
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    Computer System Structure

    5.07
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    Definition of Operating System

    15.17
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    Proposition & Logical Connectives

    42.05
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    Logical Equivalences-1

    28.32
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    Semantic Analysis-I

    5.45
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    Semantic Analysis-II

    2.09
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    Intermediate Code Generation

    3.53
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    Code Optimization

    5.03
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    Code Generation

    4.13
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    Responsibility of Operating System

    18.16
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    Properties of Operating System

    3.47
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    Batch Processing System

    7.02
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    Spooling

    7.25
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    Logical Equivalences-2

    33.18
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    Normal Forms

    32.26
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    Lexical Analyzer

    2.17
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    Responsibility of Lexical Analysis

    4.39
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    Token Pattern and Lexemes

    8.42
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    Multiprogramming

    7.11
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    Multitasking

    7.37
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    Real Time and Distributed System

    5.09
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    User Mode and Kernel Mode

    12.02
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    Operating System Services

    4.11
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    System Call

    3.43
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    Predicates & Quantifiers

    39.02
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    Nested Quantifiers

    39.02
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    C and C ++ Tokens

    8.36
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    Specification of Token

    1.26
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    Basic of String and Language

    7.04
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    Deterministic Finite State Machine

    16.4
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    Topic Covered

    4.3
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    Definition of Process

    5.51
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    Memory Layout

    7.08
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    Process Creation and Termination Command

    8.52
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    Fork Command Example

    5.33
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    Fork Command GATE Question Part-I

    6.19
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    Fork Command GATE Question Part-ll

    5.11
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    Properties of Nested Quantifiers

    41.05
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    English to Logical Statements Conversion

    31.2
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    NFA

    9.19
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    Regular Expression

    10.17
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    Finite Automata for Token Generation

    4.32
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    Context Free Grammar

    4.2
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    Derivation and Parse Tree

    3.54
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    Sentential Form

    2.41
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    Problem Solving on Process State Transition Diagram

    12.26
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    Process State Transition Diagram

    17.19
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    Context Switching

    10.56
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    Argument

    20.14
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    Rules of Inferences for Propositional Logic

    33.28
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    Syntax of Programming Language

    14.52
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    Leftmost and Rightmost Derivation

    6.44
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    Ambiguous Grammar

    5.11
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    Associativity of Operator

    10.02
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    Schedulers

    23.55
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    Thread

    27.12
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    Problem Solving Thread

    13.53
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    Rules of Inferences for Quantified statements

    30.19
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    Logical Reasoning

    32.24
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    Precedence of Operator

    8.31
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    Left Recursion

    3.58
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    Removal of Left Recursion

    9.16
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    Indirect Left Recursion

    10.14
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    Left Factoring of Grammar

    4.59
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    Non Context Free Grammar

    5.01
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    Scheduling Policies and Optimization Criteria

    10.32
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    FCFS Scheduling Policy

    9.21
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    Convoy Effect

    5.33
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    SJF Scheduling Algorithm

    13.26
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    Basics of Permutation and Combinations

    36.51
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    Combinations

    40.2
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    Parsing

    6.14
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    Top Down Parsing

    4.26
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    Recursive Descent Parser

    6.44
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    Predictive Parsing

    18.52
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    Shortest Remaining Time First

    9.36
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    Dynamic Prediction for SJF

    13.33
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    Highest Response Time Next

    5.51
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    Priority Based Scheduling

    12.26
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    Permutations

    40.55
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    Division/Distribution into Groups

    33.32
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    LL(1) Grammar

    3.47
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    Non Recursive Predictive Parser

    4.05
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    First Set Calculation

    12.26
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    First Set Example

    9.11
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    Follow Set

    17.12
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    Round Robin Scheduling Policy

    12.23
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    Multilevel Feedback Queue

    7.31
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    Pigeonhole Principle

    19.02
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    Dearrangement and Inclusion-Exclusion Principle

    21.01
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    Distribution of Identical Objects-1

    37.51
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    Predictive Parsing

    4.22
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    Non-Recursive Predictive Parsing Algorithm

    10.13
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    Identifying LL(1) Grammar

    8.26
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    Bottom up Parsing

    7.2
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    Handle

    5.24
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    Independent and Cooperating Process

    8.31
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    Inconsistency Due to Lack of Synchronization

    12.18
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    Distribution of Identical Objects-2

    32.43
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    Summation

    32.56
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    LR Parser

    4.19
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    LR(0) Items

    4.57
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    Closure Operation

    7.07
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    Go-to Operation

    5.14
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    Augmented Grammar

    4.44
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    LR(0) Collection

    8.39
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    Common Mistake in LR(0) Collection- I

    6.12
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    Race Condition and Critical Section

    8.53
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    Synchronization Mechanism

    7.25
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    Two Process Solution

    20.3
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    Peterson Solution

    12.14
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    Binomial Expansions and Binomial Identities

    21.03
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    Generating Function

    30.03
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    Properties of Generating Functions

    34.53
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    Common Mistake in LR(0) Collection- II

    7.15
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    Construction of LR(0) Parsing Table Example-I

    7.37
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    Construction of LR(0) Parsing Table Example-II

    6.16
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    Shift-Reduce Conflict

    9.17
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    LR Parsing Model

    3.38
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    Bakery Algorithm

    9.17
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    Bakery Algorithm Part-II

    10.26
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    Synchronization Hardware

    13.39
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    Application of Generating Function

    39.02
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    Recurrence Relation

    39.59
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    LR Parsing Algorithm

    6.3
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    LR Parsing Algorithm Demonstration

    8.41
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    SLR

    9.29
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    Construction of SLR Parsing Table Example-I

    7.11
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    Construction of SLR Parsing Table Example-II

    4.22
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    GATE Question Solution Semaphore

    27.1
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    Producer Consumer Solution Using Semaphore

    7.22
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    Readers Writers Problem

    10.18
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    Recurrence Relation Solving Techniques -1

    22.04
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    Recurrence Relation Solving Techniques -2

    31.55
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    Problem Solving on Recurrence Relation

    28.19
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    Reduce- Reduce Conflict

    12.54
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    SLR Example and Motivation for CLR

    15.06
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    LR(1) Items

    14.52
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    Dining Philosophers Problem

    8.35
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    Concurrent Execution Bernstein's Conditions

    10.29
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    Fork and Join Construct

    7.2
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    Parbegin and Parend Construct

    9.04
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    Basics of Sets

    25.35
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    Introduction to Functions

    20.13
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    Types of Functions

    29.38
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    LR(1) Items Example

    7.22
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    Canonical LR(1) collection and LR - CLR Parsing Table Example-I

    11.26
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    Canonical LR(1) collection Example-II

    11.05
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    Deadlock Introduction

    9.19
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    Resource Allocation Graph

    7.26
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    Methods of Handling Deadlock

    17.34
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    Resource Allocation Graph Algorithm

    3.06
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    Composition of Functions

    24.27
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    Enumeration of Functions

    30
  • Lock-Btn

    Problems on Functions

    20.12
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    Canonical LR(1) collection Example-III

    10.4
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    LALR Parser

    6.47
  • Lock-Btn

    LALR Example-I

    9.02
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    LALR Example-ll

    7.24
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    Problem with Merging in LALR

    16.26
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    Comparison of LR(0), SLR, LR(1) and LALR

    8.57
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    GATE Question Discussion

    15.28
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    Banker's Algorithm

    8.13
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    GATE Question Discussion

    11.35
  • Lock-Btn

    Deadlock Detection Criteria

    6.22
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    Introduction to Relations

    18.43
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    Operations on Relations

    33.36
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    Types of Relations Part 1

    39.36
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    Semantic Analysis Requirement

    7.06
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    Semantic Analysis

    7.07
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    Attributed Grammar Framework

    4.18
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    Syntax Directed Definition

    4.44
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    Syntax Directed Translation

    3.25
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    Synthesized Attribute

    3.4
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    Syntax Directed Translation Example-I.a

    5.09
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    Syntax Directed Translation Example-I.b

    2.35
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    Basic of Memory Management

    24.28
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    Logical and Physical Address Space

    18.57
  • Lock-Btn

    Types of Relations Part 2

    22.13
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    Relations on Ordered Pairs

    21.57
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    Counting of Relations

    28.52
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    Syntax Directed Translation Example-II

    6.44