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  • lecture301 Lectures

Analog and Digital Electronics - Electrical Engineering SEM IV of North Maharashtra University

This course is explained here:

  • Prasad Soman
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Total Chapters : 6 301 Videos
Concept of Load and Line Regulation in Power Supply
Preview
BJT: Introduction
Preview
BJT : Construction
Preview
BJT : Working
Characteristics of BJT - CB,CC CE Mode of BJT
Current Voltage Relationship
Input Output Characteristics of BJT
Thermal Runaway
Early Effect
Load Line Concept
Concept of Stability and Stability Factor
DC Analysis With BJT Circuit
Biasing Technique Types
BJT with Fixed Bias
BJT with Collector to Base Bias
BJT with Voltage Divider Bias
Numerical Example 1on DC analysis of BJT
Numerical Example 2on DC analysis of BJT
Numerical Example 3on DC analysis of BJT
Numerical Example 4 on DC analysis of BJT
Numerical Example 5on DC analysis of BJT
Numerical Example 6on DC analysis of BJT
Modelling styles of BJT and FET(re model , hybrid model h-Parameter model)
AC Analysis of CE amplifier (with bypass capacitor )
AC Analysis of CE amplifier (without bypass capacitor )
AC Analysis of CC amplifier
AC Analysis of CB amplifier
Numerical 01- AC Analysis CE - With Bypass Capacitor
Numerical 2 : AC Analysis CE-without Bypass Capacitor
FET Concept, Types, Symbol
JFET : Construction Working and Characteristics
DC Analysis of FET
Numerical Example 1 : FET DC Analysis
Numerical Example 2 : FET DC Analysis
Numerical Example 3 : FET DC Analysis
Numerical Example 4 : FET DC Analysis
CG,CD,CSmode of FET
Numerical Example 5 : On DC Analysis of JFET
Parameters of AC analysis
AC analysis of CS amplifier (with bypass capacitor )
AC analysis of CS amplifier (with unbypass capacitor )
AC analysis of CG amplifier
AC analysis of CD amplifier
numerical example 1 : CS amplifier(with bypass).
numerical example 2 : CS amplifier (without bypass)
Numerical example 3 : CG amplifier
Numerical example 4 : CD amplifier
Comparitive Study of CS,CD,CG Amplifier
Millers Theorem
High Frequency Analysis
High Frequency Analysis of BJT
Numericals on HF analysis of BJT
FET High Frequency Analysis
Alpha , Beta Cut off Frequency
Numericals 1 on High Frequency analysis of BJT
Numerical 2 High Frequency Analysis on FET
Numericals on alpha , beta cut off frequency
Introduction of Logic Gates
Preview
Types of Logic Gates - A) AND Gate
Preview
Types of Logic Gates-B) OR Gate
Preview
Types of Logic Gate - C) NOT Gate
Types of Logic Gate - D) NAND Gate
Types of Logic Gate - E) NOR Gate
Types of Logic Gate - F) EX - OR Gate
Types of Logic Gate - G) EX - NOR Gate
Realization of Basic Gates Using Nand Gate
Preview
Realization of Basic Gates Using nor Gate
Preview
DeMorgans Theorem
Preview
Boolean Laws
Preview
Boolean Laws Example -1
Preview
Boolean Laws Example -2
Boolean Laws Example -3
Boolean Laws Example -4
Boolean Laws Example -5
Introduction to Sum of Product(SOP) and Product of Sum(POS)
Preview
Standard SOP Form and Standard POS Form
Preview
Conversion of Logical Expression to SOP Form
Conversion of logical Expression to POS Form
Concept of Min Term in Logical Expression
Concept of Max Term in Logical Expression
Represention of Logical Expression Using Min Term
Represention of Logical Expression Using Max Term
Realize Logical Expression Using Basic Logic Gates
Basic Logical Operator
Preview
Intoduction to K-map
Preview
Mapping of Truth Table to K-Map
Preview
Represent SOP Expression on K-Map
Represent POS Expression on K-Map
Grouping of Two Adjacent 1's on K-Map
Grouping of Three Adjacent 1's on K-Map
Grouping of Four Adjacent 1's on K-Map
Grouping of Eight Adjacent 1's on K-Map
Sop Numerical Based on K-Map Type-1
Preview
Sop Numerical Based on K-Map Type-2
Sop Numerical Based on K-Map Type-3
Sop Numerical Based on K-Map Type-4
Pos Numerical Based on K-Map Type-1
Preview
Pos Numerical Based on K-Map Type-2
Pos Numerical Based on K-Map Type-3
Pos Numerical Based on K-Map Type-4
Introduction to Logic Family
Classification of Logic Family
Preview
Bipolar logic family
Unipolar Logic Family
Classification Based on Circuit Complexity
Comparison of CMOS & TTL
Comparison of TTL,CMOS,ECL
Introduction to Analog and Digital Signals
BCD Adder
Carry Look Ahead Adder
Introduction and types of number system
Preview
Concept of binary multiplication
Preview
Binary number system to decimal number system
Preview
Binary number system to Octal number system
Binary number system to Hexadecimal number system
Decimal number system to Binary number system
Preview
Decimal number system to Octal number system
Decimal number system to Hexadecimal number system
Octal number system to Binary number system
Preview
Hexadecimal number system to Binary number system
Octal number system to Hexadecimal number system
Hexadecimal number system to Octal number system
Octal number system to decimal number system
Preview
Hexadecimal number system to decimal number system
1's compliment and 2's compliment
Preview
Binary addition and binary subtraction
Preview
Examples an 1's and 2's compliments
Binary subtraction using 2's compliment-Example-1
Preview
Binary subtraction using 2's compliment-Example-2
Binary subtraction using 2's compliment-Example-3
Introduction to codes
Preview
Conversion of binary code to BCD code Example-1
Preview
Conversion of binary code to BCD code Example-2
Conversion of binary code to BCD code Example-3
Conversion of BCD code to Binary code Example-1
Preview
Conversion of BCD code to Binary code Example-2
Conversion of BCD code to Binary code Example-3
Conversion of BCD code to Excess-3 code Example-1
Preview
Conversion of BCD code to Excess-3 code Example-2
Conversion of BCD code to Excess-3 code Example-3
Conversion of Excess-3 code to BCD code Example-1
Preview
Conversion of Excess-3 code to BCD code Example-2
Conversion of Excess-3 code to BCD code Example-3
Concept of binary logic and logic levels
Preview
Numerical Based on QM Method Example -1
Preview
Numerical Based on QM Method Example -2
Numerical Basedon QM Method Example -3
Numerical based on QM Method Example -4
Numerical based on QM Method Example -5
Numerical Based on QM Method Example -6
Half Adder Circuit
Preview
Full Adder Circuit
Preview
Half Subtractor Circuit
Full subtractor
1 bit magnitude comparator
4 bit parallel adder circuit
n-bit parallel adder circuit
Introduction to multiplexer
Preview
Explain 4:1 MUX
Preview
Numerical based on multiplexer type-1- Example-1
Preview
Numerical based on multiplexer type-1- Example-2
Numerical based on multiplexer type-1- Example-3
Numerical based on multiplexer type-2- Example-1
Preview
Numerical based on multiplexer type-2- Example-2
Numerical based on multiplexer type-3- Example-1
Numerical based on multiplexer type-3- Example-2
Numerical based on multiplexer type-3- Example-3
Numerical based on multiplexer type-4- Example-1
Preview
Numerical based on multiplexer type-4- Example-2
Numerical based on multiplexer type-4- Example-3
Numerical based on multiplexer type-5- Example 1
Numerical based on multiplexer type-5- Example2
Implement full adder using 8:1 MUX
Preview
Introduction to DEMUX
Preview
Explanation to 1:8 Demultiplexer
Numerical based on demultiplexer type-1- Example-1
Preview
Numerical based on demultiplexer type-1- Example-2
Numerical based on demultiplexer type-2- Example-1
Numerical based on demultiplexer type-2- Example-2
Numerical based on demultiplexer type-3- Example-1
Numerical based on demultiplexer type-3- Example-2
Implement full subtractor using 1:8 DEMUX
Preview
Implement full adder using 1:8 DEMUX
Introduction to Encoder
Preview
Decimal to BCD encoder
Preview
Octal to binary encoder
Hexadecimal to binary encoder
Introduction to decoder
Numerical based on decoder type-1- EX-1
Numerical based on decoder type-1- EX-2
Numerical based on decoder type-2- EX-1
Numerical based on decoder type-2- EX-2
Introduction to sequential logic circuit
Preview
Design of Series Adder FSM
Preview
Design of Vending Machine
Universal Shift Register
Frequency Division
Implication Cable Method
Comparison of Mealy and Moore circuit
What is clock signal?
SR Latch introduction
Introduction to Flipflop
Preview
SR-FF
Preview
JK-FF
Preview
MSJK-FF
D-FF
T-FF
Conversion of JKFF to DFF
Conversion of SRFF to DFF
Preview
Conversion of JKFF to TFF
Conversion of SRFF to TFF
Conversion of SRFF to JKFF
Conversion of DFF to TFF
Conversion of T-FF to D-FF
Conversion of JKFF to SRFF
Conversion of DFF to JKFF
Conversion of TFF to JKFF
Concept of Preset & Clear in Flipflops
Difference Between Combinational Circuit and Sequential Circuit
Preview
Introduction to Counters
Preview
3 Bit Asynchronous Up Counter
4 Bit Asynchronous Up Counter
3 Bit Asynchronous Down Counter
4 Bit Asynchronous Down Counter
3 Bit Asynchronous Up-Down Counter
Introduction to Modulus of Counter
Preview
Design Mod-6 Asynchronous Counter Using JK-FF
Preview
Design MOD-13 Ripple Counter Using JK-FF
Design Decade Ripple Counter
Design 2 Bit Synchronous up Counter
Design 3 Bit Synchronous up Counter using TFF
Design 3 Bit Synchronous Up Counter Using JKFF
Design Synchronous Decade Counter Using TFF
Design Mod-12 Synchronous Counter Using JKFF
Design Mod-10 Synchronous Counter Using JKFF
Design Synchronous Counter Using T-FF Example 1
Preview
Design Synchronous Counter Using T-FF Example 2
Design Synchronous Counter Using T-FF Example 3
Design of 3 Bit Updown Synchronous Counter
Preview
Introduction to Registers
Preview
Data formats for Registers
Preview
Classification of Registers
Serial Input Serial Output
Serial Input Parallel Output
Parallel Input Parallel Output
Parallel Input Serial Output
Applications of Shift Registers
Design Synchronous Counter Ex-4
Ring Counter
Johnson Counter
Preview
Characteristics of Logic Family
Preview
Introduction to Mealy Circuit
Introduction to Moore circuit
Numerical Based on ROW Elimination Methods Example 1
Numerical Based on Row Elimination Methods Example 2

About the Instructor

Prasad Soman

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Instructor and teacher

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