Short Channel Effects

Short Channel Effects:

  1. Threshold Voltage Variation

  2. Drain Induced Barrier Lowering (DIBL)

  3. Reverse Short Channel Effect

  4. Mobility Degradation

  5. Velocity Saturation

  6. Hot Carrier Effects

  7. Output Impedance variation with Drain Source Voltage

  1. Threshold Voltage Variation
    The threshold voltage is dependent on the Channel length, as L decreases, the threshold voltage VTH decreases.
    The depletion regions protrude into the channel area and this reduces the charge reflected by the bias applied at the gate. As the Channel length cannot be precisely controlled during fabrication, the threshold voltage is now a variable factor. 

  2. Drain Induced Barrier Lowering (DIBL)
    The Drain voltage in short channel MOS transistors causes the threshold voltage to decrease.In short channel transistors the drain voltage also makes the surface more positive (as does the gate potential). Due to this the barrier to the flow of charge carriers and hence the threshold voltage decreases.
    The Drain induced Barrier Lowering (DIBL) is a significant phenomenon in short channel transistors and is modeled as 
    V_{TH}=V_{T0}-\;\eta V_{DS}

    Where 𝛈 is the DIBL coefficient and is typically of the order of 0.1 
    The DIBL causes the IDS to increase with increase in VDS in saturation 

  3. Reverse Short Channel Effect
    When the size of the channel reduces to nanometers , the threshold voltage decreases as the channel length increases from a minimum value.
    In modern devices a halo implant of heavy doping is put around the Source and Drain junctions. This help in reduction of the penetration of the Drain - depletion region into the channel region

  4. Mobility Degradation
    When the Gate voltage is large, a high electric field is developed between the Gate and the Channel. This in effect confines the charge carriers to a  narrower region under the oxide-silicon interface, this results in carrier scattering and hence lower mobility.
    The mobility degradation also affects the device transconductance.

  5. Velocity Saturation
    As we know the mobility of the carriers depends on the lateral electric field present in the channel and they drop as the electric field reaches certain levels. 
    In the relation v=𝛍E, the carrier velocity v reaches a saturated value for sufficiently high fields.
    As carriers enter the channel from the Source and race towards the Drain, they reach a saturated value at some point along the channel.
    The velocity saturation has 2 effects:

    1. Premature Drain current saturation and

    2. Reduction of transconductance

  6. Hot Carrier Effects
    Short channel MOSFETS have high lateral electric fields when the Drain - Source voltage is large. The average velocity of the carriers saturate at high electric fields, the instantaneous velocity and thus the kinetic energy of the carriers continue to increase as they accelerate towards the Drain. 
    These are called as Hot Carriers.
    As a result of this:
    Hot carriers hit the silicon atoms resulting in ionization out of the impact of the collision
    New electrons and holes are created.
    Electrons move towards the Drain and Holes move towards the Substrate.
    This results in a finite Drain substrate current  
    Now if the carriers acquire high energy, they inject into the gate oxide and they eventually flow out of the gate terminal resulting in gate current.
    Therefore to study the phenomenon of hot carriers we measure the substrate and gate currents.

  7. Output Impedance variation with Drain Source Voltage:
    The parameter  𝛌 used to model the channel length modulation assumes that the output impedance ro of the MOSFET as constant in the saturation region. But it may be noted here that the value of ro varies with the voltage VDS. 
    As VDS increases the pinch off point moves towards the Source, the rate at which the depletion region around the source becomes wider decreases, resulting in higher incremental output impedance. This variation in ro results in non linearity in the circuit.