The Figure 19 shows the different capacitances present in the MOSFET.
Figure 19: MOSFET Capacitance Model
As seen from this figure 19, capacitance exists between every two terminals of the device. Also it may be noted that the values of these capacitances depend on the type of bias applied.
Now let us consider the physical structure of the MOSFET device and identify the capacitances.
Figure 20 shows the presence of capacitances in the MOSFET.
Figure 20: Physical Structure of MOSFET showing Capacitances
Here:
C1 is the Capacitance between the Gate and the Channel.
C1= W L COX
C2 is the depletion capacitance between the Channel and the Substrate.
C2 = WLqsiNsub/(4F)
C3 and C4 are capacitances resulting from the overlap of the polysilicon with Source and Drain areas respectively. Let the overlap capacitance per unit width be defined as Cov. The units are F/m or fF/m. Therefore the Gate - Source and Gate- Drain capacitances are obtained by multiplying the Cov and W.
C5 and C6 capacitances are the junction capacitance between the Source and the Substrate and Drain and Substrate. This capacitance can be decomposed into two components:
Bottom plate capacitance of the junction Cj (Units : F/m2) and
Sidewall capacitance Cjsw (Units: F/m)
Note:
CJ is multiplied by the S/D area
Cjsw is multiplied by S/D perimeter
Discussion on Capacitances between terminals:
The MOSFET is OFF
CGD=CGS =Cov W
The Gate - Bulk capacitance is equal to the series combination of the Gate - Oxide capacitance and the depletion region capacitance.
The Capacitances CSB and CDB are functions of the Source and Drain voltages w.r.t the Substrate.